1. Field
Embodiments of the present disclosure relate to a device for measuring a threshold voltage of a MOS transistor, and more particularly, to a threshold voltage measuring device capable of accurately measuring the threshold voltage by removing an error which occurs due to a body effect or the like.
2. Description of the Related Art
FIG. 1 is a circuit diagram illustrating a conventional threshold voltage measuring device for measuring a threshold voltage of an N-channel metal-oxide-semiconductor (NMOS) transistor N.
The conventional threshold voltage measuring device supplies a gate voltage VG of the NMOS transistor N that has a constant level. The conventional threshold voltage measuring device generates a drain-source current, which is substantially the same as a reference current IREF.
The drain-source current is provided using a current mirror that includes NMOS transistors N1 and N2.
A method for measuring a threshold voltage includes a constant current method. In the constant current method, a threshold voltage is defined as a gate-source voltage when a predefined pinch-off current ISPEC flows between the drain and source of a MOS transistor.
The pinch-off current ISPEC may be defined as a drain-source current of the MOS transistor when a pinch-off of a channel in the MOS transistor occurs. A magnitude of the pinch-off current ISPEC may be experimentally determined.
For example, for an illustrative fabrication technology, the pinch-off current ISPEC may be determined as expressed by Equation 1 below. In Equation 1, W represents a channel width of a MOS transistor, and L represents a channel length of the MOS transistor.
                              I          SPEC                =                              W            L                    ×                      10                          -              7                                ⁢                      (            A            )                                              [                  Equation          ⁢                                          ⁢          1                ]            
FIG. 2 is a graph illustrating a threshold voltage measurement method using the constant current method.
The graph of FIG. 2 shows a drain-source current IDS according to a gate-source voltage VGS and a drain-source voltage VDS.
A magnitude of the pinch-off current ISPEC shown in FIG. 2 may be experimentally determined, as expressed by Equation 1.
A first solid curve indicates the gate-source voltage VGS when a first drain-source voltage VDS1 is sufficiently large to cause the NMOS transistor N to operate in a saturation region. A second solid curve indicates the gate-source voltage VGS when a second drain-source voltage VDS2 is sufficiently small to cause the NMOS transistor N to operate in a linear region.
Referring back to FIG. 1, the drain-source current IREF is adjusted to have substantially the same magnitude as that of the pinch-of current ISPEC when the gate voltage VG is maintained constant, and a source voltage VS is measured. At this time, the gate-source voltage VGS corresponds to the threshold voltage of the NMOS transistor N.
However, when a potential difference occurs between a back gate of a MOS transistor and a source of the MOS transistor, a body effect may lead to a variation in the threshold voltage. Where 2ϕB is a surface potential, VBS is a source-to-body substrate bias, and γ is a fabrication-process parameter, the variation of the threshold voltage ΔVT due to the body effect may be expressed as Equation 2 below:ΔVT=γ(√{square root over (2ϕB+VBS)}−√{square root over (2ϕB)}).  [Equation 2]
In the conventional threshold voltage measuring device, when the source voltage or the back gate voltage varies, the body effect may occur. In this case, the threshold voltage may vary. Thus, although the gate-source voltage VGS is measured when the pinch-off current ISPEC is applied as described above, the threshold voltage of the NMOS transistor N may not be accurately measured.